cl_dram_dma/build/constraints/cl_pnr_user.xdc contraints good for any cl?

Looks like in the dram_dma exmple there are a number of floor planning directives to improve timing/routability.
I currently do not use DRAM or the DMA in my cl, should I include these constraints in my cl since these interfaces cannot be eliminated from the shell 9but only tied off)? is there more documentation on what these constraints are doing and how they were derived?