Prevent URAM Inference

Hi TimSnyder,

Regarding to the URAM initialization, in general URAM gets initialized to all 0s after device is powered up and there is no way to initialize it like BRAM. For the situation where the AGFI gets switched, we are confirming with Xilinx on the URAM state. I'll get you updated as soon as I hear back from Xilinx.

Regarding to the '-max_uram' option of command 'synth_design', it only directs the synthesizer to stop inferring any RTL based memory code to URAMs. But it doesn't prevent the user from instantiating the URAM primitive directly in a design. In this case, you shouldn't see an error even with '-max_uram 0'.

Thanks,

• Chen

Hi Chen,

Thanks for your reply.

In the case where we launch an f1 instance and load the initial AGFI (for that VM instance), can we assume that the FPGA has been power-cycled? I've been assuming that "powered-up" will only ever happen when the host machine is booted by AWS but if we can know that the URAM is initialized to 0 when the f1 VM instance is created (or perhaps when the VM boots each time), that information would also be very helpful.

In other words, if 'fpga-clear-local-image' then 'fpga-load-local-image' does not initialize the URAM but there is another method that we can use that does, I would be open to changing our code.

Thanks,
-Tim

Hi Tim,

From the information provided by Xilinx, URAM will be cleared/initialized to all 0s under two conditions: 1) device power cycle 2) device configuration. In this case, since switching different AGFIs would trigger the partial reconfiguration of the device, that would be considered as condition 2) above. URAM should be cleared to all 0s. So, you should be able to assume that the URAM always comes up with a clean state right after a AGFI loading. Hope this helps.

Thanks,

Chen