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How to use AMD Vivado IPs (e.g., AXI Datamover, AXI Crossbar) in AWS F2 HDK Flow?

0

Hi,

I'm working with the AWS F2 FPGA instance using the HDK flow from the following repository: https://github.com/aws/aws-fpga/tree/f2

I’d like to use AMD Vivado IPs such as:

I understand that an AXI Crossbar is already included in the CL example design, but I want to generate and use a customized version (e.g., with a different number of AXI slave/master ports) via Vivado’s IP Catalog.

Could someone please guide me on:

  1. How to integrate Vivado-generated IPs like AXI Datamover or a custom AXI Crossbar into the AWS HDK flow for F2?
  2. Are there any limitations, best practices, or example projects for this kind of integration?

Any help or pointers would be greatly appreciated. Thanks in advance!

Best Regards, ywcec

asked a year ago206 views
2 Answers
2

To integrate AMD Vivado IPs like AXI Datamover or a custom AXI Crossbar into the AWS HDK flow for F2 instances, you'll need to follow a process similar to integrating other IPs in the FPGA development workflow. Here are the steps and considerations:

  1. Generate the IP: Use Vivado's IP Catalog to generate your custom IP (e.g., AXI Datamover or custom AXI Crossbar). Configure the IP as needed for your specific requirements.

  2. Add the IP to your project: Once generated, add the IP to your F2 HDK project. You'll need to include the IP's XCI file and any associated source files in your project structure.

  3. Instantiate the IP: In your top-level design file, instantiate the custom IP and connect its ports appropriately to your design.

  4. Update synthesis scripts: Modify your synthesis scripts to include the new IP. You'll need to add a read_ip command for your custom IP, similar to how other IPs are included. For example:

read_ip [list \
$HDK_SHELL_DESIGN_DIR/../../ip/cl_ip/cl_ip.srcs/sources_1/ip/your_custom_ip/your_custom_ip.xci \
# ... other IPs ...
]
  1. Adjust timing constraints: Ensure that your timing constraints accommodate the new IP. You may need to modify existing constraints or add new ones specific to your custom IP.

  2. Validate and build: Run through the entire build process, including synthesis, implementation, and timing closure. Address any issues that arise during this process.

  3. Test thoroughly: Once your design builds successfully, test it extensively to ensure the custom IP functions correctly within the F2 environment.

Best practices and considerations:

  1. Compatibility: Ensure the Vivado version used for IP generation matches the one supported by the F2 HDK.

  2. Resource utilization: Be mindful of FPGA resource usage, especially when adding complex IPs or increasing the size of existing ones.

  3. Timing closure: Custom IPs may impact overall design timing. Pay close attention to timing reports and adjust as necessary.

  4. Documentation: Maintain clear documentation of any custom IPs and modifications to aid in future development and troubleshooting.

  5. Version control: Keep track of IP versions and configurations used in your project.

While there may not be specific example projects for integrating these exact IPs in the F2 HDK, you can refer to existing examples in the HDK that demonstrate IP integration as a general guide. The process should be similar to integrating other custom logic or IPs into the F2 design flow.

Remember to thoroughly test your design with the custom IPs to ensure compatibility and performance within the F2 instance environment.
Sources
How to migrate a VeriFire Emulator design from F1 to to F2 Instances | AWS HPC Blog
F2
How to start vivado GUI inside DCV? | AWS re:Post

answered a year ago
AWS
SUPPORT ENGINEER
reviewed a year ago
0

Hi,

The smoothest way to integrate new ip is add open the IP project under hdk/common/cl_ip and add the ip you want and generate it there.

For synthesis you'll need to modify the tcl where it reads the rest of the ip in the ip e.g. https://github.com/aws/aws-fpga/blob/f2/hdk/cl/examples/cl_sde/build/scripts/synth_cl_sde.tcl

For simulation you'll need to add it to the local common lists in this file: https://github.com/aws/aws-fpga-resources/blob/Vivado_2024.2-hdk/common/ip/cl_ip/common_liblists.mk

answered 10 months ago

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