DRAM zeroed out by fpga-clear-local-image?

Question

Hi, our application relies on DRAM being cleared (zeroed out) before starting execution on the FPGA. So far, we've been manually zeroing out DRAM through our own mechanism, but I noticed that the description of fpga-clear-local-image states that it "Clears the specified FPGA image slot, including FPGA internal and external memories that are used by the slot."  
  
Does this mean that if we do fpga-clear-local-image followed by an fpga-load-local-image, we can rely on DRAM being zeroed out when the AGFI we load starts running?  
  
Relatedly, can we also rely on URAMs being zeroed out when going through the same process (clear then load)?  
  
Edited by: user2 on Nov 7, 2019 10:23 AM

awsasif · Accepted Answer

Hello,  
  
The DRAM is guaranteed to be "cleared out", which means the contents will be wiped, but this does not guarantee the data is zero.  UltraRAM is initialized to 0 on CL load (note no clear is needed).  
  
Thanks,  
-Asif

DRAM zeroed out by fpga-clear-local-image?

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