Error in place design stage [DRC HDPR-6] Logic illegally placed:

Hi Prigish,

We are checking on this and we will get back to you soon.

Thanks,
Sunil.

Hello all,

I think we need more information to investigate this issue. First, if we could obtain the constraints file(s) that define these elements that would be helpful.

Specific questions to ask are:

• Where do you intend the element in question (payload_a_reg(186)) to reside? Is the register supposed to be a part of the static pblock, or a different RP pblock?
• Pblock_SH is not indicated in the constraints you listed, so we would need to know about this as well.

OK, if you could provide this information we would appreciate it.

Best regards,
Scott

Hi Scott,

You can find the constraints (given by us) file through the following link:
https://drive.google.com/open?id=10B-RmWEuVcFMWdoXb59eZJawUu30oaZd

We have not given any constraints for pblock_SH.Those are automatically generated by AWS scripts.

Hi Scott,

We faced another problem too during floorplanning in SLR2.
We gave following commands in the xdc file :
create_pblock pblock_SLR2
resize_pblock (get_pblocks pblock_SLR2) -add {CLOCKREGION_X0Y10:CLOCKREGION_X5Y14}
set_property PARENT pblock_CL (get_pblocks pblock_SLR2)

During the place design stage, it throws the following error :
(DRC HDPR-14)Nested Partition Pblocks must have a common ancestor Pblock: The Pblock 'pblock_CL' and Pblock 'pblock_BA452_top_0' do not have a common ancestor for the HD.RECONFIGURABLE partition 'WRAPPER_INST/CL'.
(DRC HDPR-66) Reconfigurable Pblock must not overlap other pblocks.: HD.RECONFIGURABLE Pblock 'pblock_CL' and Pblock 'pblock_BA452_top_0' overlap. Please re-floorplan Pblocks to ensure that reconfigurable pblocks don't have overlap with other rm or static pblocks.

Can you please take a look into this issue too please?
Currently we are using only the below mentioned portion of SLR 2:
resize_pblock (get_pblocks pblock_SLR2) -add {CLOCKREGION_X0Y11:CLOCKREGION_X5Y14}
resize_pblock (get_pblocks pblock_SLR2) -add {CLOCKREGION_X0Y10:CLOCKREGION_X2Y10}

Can you please suggest what needs to be done to overcome this?

Hello,

Thank you for providing the constraints, that helps. I think for the first error, this looks to be valid, and that your reconfigurable partition boundaries are overlapping the AWS static partition. I am not sure of those boundaries, so was wondering if you could provide a complete set of constraints excluding the timing ones. You can do that with the following command:

“write_xdc -exclude_timing netlist_constraints.xdc”.

This should give us the entire PBLOCK structure.

For the second error, this may be due to a known issue with parent/child blocks and snapping mode. The workaround for that issue is to set the SNAPPING_MODE to ON. Can you try that to see if it helps with your design?

OK, thank you,
Scott

Thanks for the response Scott.

Actually I was able to get through the first error.
There was a "register slice 0" mentioned in my XDC file which was causing the trouble because it was being referenced both by pblock_CL and pblock_SH .
So I changed the name in the XDC file and that problem got solved.

Regarding the second problem, I will try your recommendation(SNAPPING mode ON) and will update you with the results.

Thanks
Prigish