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Question about the ILA Debugging Process

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I learned from the AWS-FPGA GitHub repository that debugging can be performed using JTAG through ILA (XVC Server). However, I am wondering if it is possible to use JTAG-based ILA during software verification processes (e.g., sudo ./sde_loopback_simple). Or is it only available for hardware-level debugging?

If it is possible, how can I resolve the following error?

$ sudo su $ make install make -C /lib/modules/5.15.0-1084-aws/build M=/home/ubuntu/driver_v0.4 modules make[1]: Entering directory '/usr/src/linux-headers-5.15.0-1084-aws' CC [M] /home/ubuntu/driver_v0.4/mmconfig-shared.o CC [M] /home/ubuntu/driver_v0.4/mmconfig_64.o CC [M] /home/ubuntu/driver_v0.4/xvc_pcie_driver_base.o CC [M] /home/ubuntu/driver_v0.4/xvc_pcie_driver.o LD [M] /home/ubuntu/driver_v0.4/xilinx_xvc_pci_driver.o MODPOST /home/ubuntu/driver_v0.4/Module.symvers CC [M] /home/ubuntu/driver_v0.4/xilinx_xvc_pci_driver.mod.o LD [M] /home/ubuntu/driver_v0.4/xilinx_xvc_pci_driver.ko BTF [M] /home/ubuntu/driver_v0.4/xilinx_xvc_pci_driver.ko Skipping BTF generation for /home/ubuntu/driver_v0.4/xilinx_xvc_pci_driver.ko due to unavailability of vmlinux make[1]: Leaving directory '/usr/src/linux-headers-5.15.0-1084-aws' mkdir -p /lib/modules/5.15.0-1084-aws/kernel/drivers/pci/pcie/xilinx/ cp -f xilinx_xvc_pci_driver.ko /lib/modules/5.15.0-1084-aws/kernel/drivers/pci/pcie/xilinx/ $ depmod -a $ modprobe xilinx_xvc_pci_driver $ lsmod | grep xilinx xilinx_xvc_pci_driver 16384 0 $ cd /opt/Xilinx/Vivado/*/bin/ $ ./xvc_pcie ERROR: Failed to Open Device ERROR: Opening JTAG port failed

Description: Xilinx xvc_pcie v2024.1 Build date : May 22 2024-19:19:01 Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

ERROR: Failed to Open Device ERROR: Opening JTAG port failed Exiting xvc_pcie application.

asked a year ago223 views

2 Answers
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Based on the information provided, it appears you're trying to use JTAG-based ILA (Integrated Logic Analyzer) debugging with the XVC (Xilinx Virtual Cable) server on an AWS F2 instance.

JTAG-based ILA debugging is primarily designed for hardware-level debugging of FPGA designs rather than software verification processes like the sde_loopback_simple test. The XVC server allows you to connect hardware debugging tools like Vivado to your FPGA design running on AWS F2 instances.

Regarding the error you're encountering, there are a few potential issues:

  1. The error "Failed to Open Device" suggests that the XVC PCIe driver is loaded (as confirmed by your lsmod output), but it's unable to communicate with the FPGA hardware properly.

  2. This could be due to a loopback test failure, which is a common issue when the XVC driver can't properly communicate with the debug bridge IP in the FPGA design.

To resolve this issue, try the following:

  1. Ensure you're running all commands with root privileges (which you are doing with sudo su).

  2. Verify that you're using a compatible version of Vivado with the F2 instance. The documentation may reference Vivado 2024.2, while you might be using 2024.1, which could cause compatibility issues.

  3. Make sure you're using the correct FPGA Developer AMI version that's compatible with your tools.

  4. Check if there are any system logs or error messages that might provide more details about why the device failed to open.

  5. Try launching a fresh F2 instance using the latest FPGA Developer AMI and follow the XVC driver installation steps again.

If you continue to experience issues, you may need to contact AWS support for more specialized assistance with F2 instances and the XVC server.
Sources
XVC server on AWS F2 instance fails with "Loopback test FAILED" after XVC PCIe driver installation | AWS re:Post

answered a year ago

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Hello!

Thank you for reaching out with this question & issue with the virtual JTAG debugging and XVC driver. We recommend embedding ILA's in your FPGA design to collect valuable information to debug any issues when exercising the design with software stimulus. Using an ILA in your design is typically most powerful when running your software on your FPGA hardware design.

As for how to use the Virtual JTAG features, ensure that you load an Amazon FPGA Image with an ILA inside and follow the Virtual JTAG guide here on our ReadTheDocs page: https://awsdocs-fpga-f2.readthedocs-hosted.com/latest/hdk/docs/Virtual-JTAG-XVC.html

answered a year ago

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