All Content tagged with FPGA Development

Accelerate your applications with FPGA technology

Content language: English

Select up to 5 tags to filter
Sort by most recent
152 results
Hi I'm wondering if the AWS team have any plans to make an FPGA development AMI based a modern Linux distro? The Amazon Linux 2 and CentOS 7 AMIs are now really out of date and I'm struggling to run ...
1
answers
0
votes
14
views
asked 3 days ago
Hi, I have been running a simulation in Vivado. Writing into the BRAM of 16 KB through PCIS is taking more than 2 hours. I need to write more than 10 BRAMS. If it takes time like this, I am worrying...
2
answers
0
votes
133
views
asked 3 months ago
Hi, I have a text file. It has 32 bit data in each line up to 4096 lines. My testbench needs to read the text file and loads a memory which is connected to SHELL's PCIS/DMA using the following. ``` ...
3
answers
0
votes
107
views
asked 3 months ago
Hello, I am having an issue with a program running on an Amazon F1 FPGA instance. When I run the program, the program gives me this error message when I run it with the environment variable XCL_EMULA...
0
answers
0
votes
205
views
asked 5 months ago
Right now I'm working to put a MicroBlaze core with Vivado IP Integrator flow, however, I can't connect to the MicroBlaze Debug Module (MDM) when I deployed in on an EC2 F1 instance. My design is as ...
1
answers
0
votes
114
views
asked 6 months ago
Can I use "host memory access" in Amazon F1 instance? Alveo supports such a feature that provides DMA bypass capability used for FPGA to transfer date to the host on a No-DMA platform. Since I have no...
Accepted AnswerFPGA Development
1
answers
0
votes
151
views
asked 7 months ago
Hi, Is it possible to upgrade the F1 nodes' Viti's version to 2023.2? I am currently using the AMI 1.2 image.
1
answers
0
votes
209
views
asked 8 months ago
To check AMI and AFI approved by others using AWS cli, I used the command "aws ec2 description-fpga-images > output", An error occurred (UnauthorizedOperation) when calling the DescribeFpgaImages ope...
1
answers
0
votes
335
views
asked 8 months ago
hello, on the F1 instances, is there a way to access the full 72 bit of the DDR4 banks from the CL? our application would benefit from giving up ECC support, and having access to the extra bits in r...
1
answers
0
votes
230
views
asked 10 months ago
I am following the documentation linked below. I was able to build the image successfully but when I try to complete step 7 I get an error in the console also shown below. Since the script that runs t...
0
answers
0
votes
159
views
asked a year ago
I cannot pop up GUI when I use mobaxterm if I set emulation debug=gui in Amazon AMI here https://aws.amazon.com/marketplace/pp/prodview-hxbanceez6tso. It should pop up if I set it when I do HW emulat...
1
answers
0
votes
280
views
asked a year ago
Hi, ![Enter image description here](/media/postImages/original/IMHuUteqzyRb6Kfpz-x8mzJw) Look at the above image. From **module A**, a gated clock is going to **module B**. We found that **module B*...
1
answers
0
votes
275
views
asked a year ago