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All Content tagged with FPGA Development

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146 results
Can multiple DCPs be loaded into an AFI and only enable certain DCPs at a time on the fly?
2
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311
views
asked 2 years ago
Can I have an estimated load time when loading an already generated AFI into a FPGA slot on an F1 instance? I see that the load time can be decreased through caching and data retention. I have read th...
1
answers
0
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366
views
asked 2 years ago
Hello, I am implementing an FPGA IP connected to the AWS shell through AXI interface. The IP performs : loading data from DDRA, calculation on these data storing the result in DDRB The IP...
1
answers
0
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264
views
asked 2 years ago
The goal is to have an FPGA in an F1 instance that can be partially reconfigured on the fly to support a variety of use cases. Could this be done through providing AWS a DCP that in itself partially r...
1
answers
0
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285
views
asked 2 years ago
Hello I am building my application using AWS F1. But it keeps crashing. I get the following error about pblock overlap. This is internal to F1 shell and CL. I have not created any of these pblocks. Ho...
0
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56
views
asked 2 years ago
I understand that sagemaker Deepar is a deep learning-based model designed for time series forecasting and it is primarily used for univariate time series forecasting. However, it can incorporate dyna...
1
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0
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913
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asked 2 years ago
Does Amazon EC2 F1 Instance have FPGA development board with HBM, e.g., Virtex UltraScale+ HBM VCU128 ([https://www.xilinx.com/products/boards-and-kits/vcu128.html]())?
1
answers
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496
views
asked 2 years ago
Hi, I see the following system verilog warnings from the DDR controller when running a test on my design. I am including the directory and command below: directory=aws-fpga/hdk/cl/developer_designs...
Accepted AnswerFPGA Development
1
answers
0
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424
views
asked 2 years ago
I was deploying Strapi to AWS and when I write the command to build npm it shows an error of cannot find module : metadata.js deploy ![error image](/media/postImages/original/IMK6fHQDKjSyOQiZE8o682yA...
0
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0
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93
views
asked 2 years ago
I wonder if the process of generating AFI for Amazon F1 instance will generate bitstream like local FPGA development.
1
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0
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354
views
asked 2 years ago
After compiling the RTL, I can get a DCP. Then, a AFI will be generated using the aws ec2 create-fpga-image API. I wonder if a bitstream is generated during this process. If generated, whether the bi...
2
answers
0
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377
views
asked 2 years ago
Hi, I am able to create AHB Slave interface in local machine in vivado IP design. But **I am unable create AHB Slave interface in AWS Server**. In AWS server AXI Slave interface I am able to create...
2
answers
0
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296
views
asked 2 years ago