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Questions tagged with FPGA Development
Accelerate your applications with FPGA technology
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Hello there,
when i use following command to get the platform informantion by "platforminfo -p $AWS_PLATFORM", it show following warning or error message :
application-specific initialization failed...
Hi I am using FPGA Developer AMI (Ubuntu) - 1.16.0,
and I was trying to follow the C++ flow in the latest post in https://github.com/aws/aws-fpga/tree/f2/vitis,
and I got the following error when runn...
is there any license problem to use the fpga developer ami in my company's network?
i am finding some documents about it, but i can't find it
Hi
I'm wondering if the AWS team have any plans to make an FPGA development AMI based a modern Linux distro? The Amazon Linux 2 and CentOS 7 AMIs are now really out of date and I'm struggling to run ...
Hi,
I have been running a simulation in Vivado.
Writing into the BRAM of 16 KB through PCIS is taking more than 2 hours.
I need to write more than 10 BRAMS. If it takes time like this, I am worrying...
Hi,
I have a text file. It has 32 bit data in each line up to 4096 lines.
My testbench needs to read the text file and loads a memory which is connected to SHELL's PCIS/DMA using the following.
```
...
Hello, I am having an issue with a program running on an Amazon F1 FPGA instance.
When I run the program, the program gives me this error message when I run it with the environment variable XCL_EMULA...
Right now I'm working to put a MicroBlaze core with Vivado IP Integrator flow, however, I can't connect to the MicroBlaze Debug Module (MDM) when I deployed in on an EC2 F1 instance.
My design is as ...
Can I use "host memory access" in Amazon F1 instance? Alveo supports such a feature that provides DMA bypass capability used for FPGA to transfer date to the host on a No-DMA platform. Since I have no...
Hi,
Is it possible to upgrade the F1 nodes' Viti's version to 2023.2?
I am currently using the AMI 1.2 image.
To check AMI and AFI approved by others using AWS cli,
I used the command "aws ec2 description-fpga-images > output",
An error occurred (UnauthorizedOperation) when calling the DescribeFpgaImages ope...
hello,
on the F1 instances, is there a way to access the full 72 bit of the DDR4 banks from the CL?
our application would benefit from giving up ECC support, and having access to the extra bits in r...