How to use burst mode of AXI-4?

Hi
Each DRAM interface is accessed via an AXI-4 interface - AXI-4 (CL Master and DRAM controller is slave) – 512-bit AXI-4 interface to read/write DDR. For RTL/HDK development, the cl_dram_dma is a starting point. Please refer to the AXI4 spec for guidance on how to do burst transfers. https://www.xilinx.com/products/intellectual-property/axi.html#overview
Thanks
Kris