cl_debug_bridge

0

I am trying to use the cl_ila same as in cl_dram_dma., i.e, I have the 2 AXI busses to monitor using ILA.
However the synthesis script cannot seem to find the cl_debug_bridge module.
Which files/options etc need to be modified in build/scripts to synthesise the ILA?

已提问 3 年前175 查看次数
2 回答
0

Hello,

I think in your build scripts, you need to read in the cl_debug_bridge IP: https://github.com/aws/aws-fpga/blob/master/hdk/cl/examples/cl_dram_dma/build/scripts/synth_cl_dram_dma.tcl#L83
Another thing is to check if the sv file with the ila/debug bridge module instantiation is being read in as well. For eg, the encrypt.tcl file copies it over to a single source directory and is then included during synthesis in our scripts.

Let us know if that doesn't help solve this issue.

-Deep

Deep_P
已回答 2 年前
0

I was missing the cl_ila in encrypt.tcl

已回答 2 年前

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