Hi ,
I am creating a project in which oscillators are involved . I do the implementation on my system and then create the tar file and upload it to the AWS instance for AFI image creation.
But it throws the following error :
" ERROR: (DRC LUTLP-1)Combinatorial Loop Alert: 2 LUT cells form a combinatorial loop. This can create a race condition. Timing analysis may not be accurate. The preferred resolution is to modify the design to remove combinatorial logic loops. If the loop is known and understood, this DRC can be bypassed by acknowledging the condition and setting the following XDC constraint on any one of the nets in the loop: 'set_property ALLOW_COMBINATORIAL_LOOPS TRUE (get_nets <myHier/myNet>)'."
I tried setting the property as suggested above in the error comand but still i am not able to bypass this DRC error.
Any suggestions on this issue?
Thanks
Prigish