PCIS DMA BAR4 Disable Prefetch

0

I see that BAR4 (used by PCIS) is prefetchable per this document:
https://github.com/aws/aws-fpga/blob/master/hdk/docs/AWS_Fpga_Pcie_Memory_Map.md

How can I disable prefetching for that BAR, similar to BAR0 and BAR1? I know prefetch is a FPGA DMA core setting - but I think it can be disabled in software?

I am looking into if/how it could be done in XDMA. I am about to try setting MAX_EXTRA_ADJ=0 (no extra adjacent descriptors to prefetch). https://github.com/aws/aws-fpga/blob/7f1e76765766f579d3a767bedf669019d50342f3/sdk/linux_kernel_drivers/xdma/libxdma.h

Any information would be helpful.

Update Apparently for 64b address space BARs (like BAR4) you cannot disable prefetching? Only for 32b address spaces?

Thanks

Edited by: absurdfatalism on Jul 5, 2020 7:26 PM

質問済み 4年前221ビュー
2回答
0

Hi absurdfatalism,

The Prefetchable attribute of any of the PCI BAR in AWS F1 cannot be modified by the software.

AWS F1 support the BARs and their attributes listed in the link below

https://github.com/aws/aws-fpga/blob/master/hdk/docs/AWS_Fpga_Pcie_Memory_Map.md

The setting MAX_EXTRA_ADJ under sdk/linux_kernel_drivers/xdma/libxdma.h is unrelared to the BAR prefetchable attribute.

Thanks,
Sunil.

AWS
回答済み 4年前
0

Posted follow up thread.

回答済み 4年前

ログインしていません。 ログイン 回答を投稿する。

優れた回答とは、質問に明確に答え、建設的なフィードバックを提供し、質問者の専門分野におけるスキルの向上を促すものです。

質問に答えるためのガイドライン

関連するコンテンツ